MeasureSLOC(&LMS); /* 2010/{05,06} */

5, 6月分のdiffstat．

bench/BENCH_CALCULATE_SNR_SINR.vhd |   10 
 bench/BENCH_DIVSR_RR.vhd           |    6 
 bench/BENCH_LMS.vhd                |  196 ++++++---
 bench/BENCH_LMS_LX.vhd             |   37 +
 bench/BENCH_S1IC.vhd               |   95 +++-
 bench/BENCH_S1WCAL.vhd             |   29 +
 bench/BENCH_S1p2SIC.vhd            |  133 +++---
 bench/BENCH_S2WFMA.vhd             |   72 ++-
 bench/BENCH_S4LLR.vhd              |  160 +++++--
 bench/BENCH_S5LDPCD.vhd            |    3 
 bench/BENCH_S6PP.vhd               |    7 
 bench/BENCH_S7RIE.vhd              |    3 
 bench/BENCH_S7SRG.vhd              |    4 
 vhdl/AANORM.vhd                    |    6 
 vhdl/ABS2SR_C.vhd                  |   23 +
 vhdl/ADDSR_CC.vhd                  |   14 
 vhdl/ADDSR_RR.vhd                  |   25 +
 vhdl/ADDSR_UU.vhd                  |   37 +
 vhdl/BS4LLR.vhd                    |  161 ++-----
 vhdl/CALCULATE_SINR.vhd            |  106 +++--
 vhdl/CALCULATE_SNR.vhd             |  249 ++++++++++-
 vhdl/COMMON_TYPE_PKG.vhd           |   28 +
 vhdl/DIVSR_CR.vhd                  |   10 
 vhdl/DIVSR_RR.vhd                  |   23 +
 vhdl/ESTIMATE_NOISE.vhd            |    4 
 vhdl/GTSAT.vhd                     |  172 ++++++++
 vhdl/IMPORT_LX1_F1J6.vhd           |    4 
 vhdl/IMPORT_LX1_F2J4.vhd           |    4 
 vhdl/IMPORT_LX2_F3J1.vhd           |    4 
 vhdl/IWSRFA.vhd                    |   48 +-
 vhdl/LEDIND.vhd                    |  182 ++++++++
 vhdl/LE_BUS.vhd                    |  166 +++++++
 vhdl/LLR2PP.vhd                    |  273 ++++++-------
 vhdl/LMS_FORMER.vhd                |  400 ++++++++++++-------
 vhdl/LMS_LATTER.vhd                |  206 +++++++--
 vhdl/LMS_LX1_FPGA1.vhd             |  425 +++++++++++++-------
 vhdl/LMS_LX1_FPGA2.vhd             |  381 ++++++++++++------
 vhdl/LMS_LX1_FPGA3.vhd             |  244 +++++++++--
 vhdl/LMS_LX1_FPGA4.vhd             |  274 ++++++++++---
 vhdl/LMS_LX2_FPGA1.vhd             |  220 ++++++++--
 vhdl/LMS_LX2_FPGA2.vhd             |  340 +++++++++++++---
 vhdl/LMS_LX2_FPGA3.vhd             |  321 ++++++++++-----
 vhdl/LMS_LX2_FPGA4.vhd             |  339 +++++++++++-----
 vhdl/LMS_LX3_FPGA2.vhd             |  132 +++++-
 vhdl/LMS_LX_FEBE.vhd               |  768 ++++++++++++++++++++++++++++++++-----
 vhdl/MULSR_CC.vhd                  |   63 ++-
 vhdl/MULSR_CR.vhd                  |   12 
 vhdl/MULSR_RR.vhd                  |   42 +-
 vhdl/MULSR_UU.vhd                  |   25 +
 vhdl/NbySNR.vhd                    |   39 +
 vhdl/PP2RIE.vhd                    |    5 
 vhdl/PP2SRG.vhd                    |   25 -
 vhdl/S0SNR.vhd                     |   41 +
 vhdl/S1IC.vhd                      |   56 +-
 vhdl/S1WCAL.vhd                    |   59 ++
 vhdl/S1WCCM.vhd                    |   22 +
 vhdl/S1WCFA.vhd                    |  104 +++--
 vhdl/S1WCFB.vhd                    |  138 ++++--
 vhdl/S1WDET.vhd                    |   16 
 vhdl/S1WINV.vhd                    |   12 
 vhdl/S1p2SIC.vhd                   |  198 ++++++---
 vhdl/S2WFMA.vhd                    |  100 ++--
 vhdl/S3SINR.vhd                    |    6 
 vhdl/S4LLR.vhd                     |   28 -
 vhdl/S5LDPCD.vhd                   |   39 +
 vhdl/S6PP.vhd                      |    6 
 vhdl/S7RIE.vhd                     |   18 
 vhdl/S7SRG.vhd                     |   10 
 vhdl/SRG2IC.vhd                    |  144 ++++--
 vhdl/WCCM.vhd                      |   16 
 vhdl/WFMA.vhd                      |  256 ++++++------
 vhdl/WS4LLR.vhd                    |   36 +
 72 files changed, 5884 insertions(+), 1976 deletions(-)

ようやくこの子も嫁に行った． :D
おもろかったのは，固定小数点演算とレイテンシー継承が十分堪能出来た事．
つまんなかったのは，毎度の事だがISEのbugを踏んだ事だな．
ほんともうまじいいかげんにしろよだぼがあーむこあだのゔぁーてっくすななだのうりこむよゆうがあんならげんこうのでばいすをまともにつかえるようなそふとのひんしつぐらいかくほしとけよかすめそれまでおれはてめーをぜってーゆるさねーからなくずが（りゃく