O HAI THIS BLOG PURPZIEZ 2 B UZED AZ MAH PLESIOUS MEM. :)

2007/02/24

doReport(&devProgress);

RAM/LUT over mappingをIFFT/FFT部のRAMをシフトレジスタ化して解決,
PCIバスロックの原因になっていた内部バス変換アダプタの非同期トリガを修正,
トップレベルの対向STAのテストベンチの中身にピンアサインを反映,
PLLからのクロック入力のピンアサインを忘れていたっぽいので追加,
D/A変換部が二の補数表現ではなくオフセットバイナリだったので修正,
RF部の抜けていた仕様からの要求でIF出力のオフセットをパラメータに追加.
[Fix RAM/LUT over mapping by using shifter in IFFT/FFT instead of RAM.
Fix PCI bus lock by purging async triggers of internal bus adapter.
Back port real pin assigned entity to top test bench of STA to/from STA.
Fix a pin assign constrain of clock input from PLL.
Fix D/A semantics part, it can only recognize offset binary representation,
not 2's complement's.
Add IF output offset paramter entity and functionalities for a missing RF spec.]

帰宅してから,最後の変更で必要になったパラメータを上位階層から与える
機能を追加し忘れた事に気付いて萎える. :(((
[Returned my home, the last commit is mandatory to add the semantics in upper
layer to specify the parameter, I realized it just now, ZOMG... :(((]

2007/02/20

Crash(&Xilinx.ISE[8][2][i]);

VHDLのファイルを追加するとたまーに死ぬISE. :(((
なので,そーっと,そーっと...:DDD
[When it was added a VHDL file, it did *sometimes* crash.
ZOMG, retarded ISE. :(((
'Kay, I'll do more softly... it should be a overdelicate crap. :DDD]

2007/02/18

Xilinx.ISE[8][2][i].karma--; /* XC3S500 */

楽しい楽しい休日出勤. :p
[Hmm, it's a delightful holiday work. :p]

鬼コードした約500モジュールのVHDLをISEでムニャる.
Optimize GoalをSpeedにしてムニョるとBlock RAMが足りない.
Optimize GoalをAreaにしてヘニャるとLUTが足りない.
と言うか,top levelでしかOptimimze *やら* Styleって指定出来ない構造?
つーか,Over mappingしているの分かっているのに次のstageに進むのって
build systemが低品質過ぎね? :p
これだからbloatなIDEはだめだめなんじゃよ.
[I've poking about 500 momdules of VHDL w/ suck0rz Xilinx ISE.
When specified Optimize Goal to Speed or so, it sez exceeded Block RAM resource.
When specified Optimize Goal to Area or so, it sez exceeded LUT resource.
Well, it can not handle Optimize * or * Style feature at non-top level?
Blah, although it was already over mapped, t3h blob forces to go to next stage,
ZOMG... :p
That's why I hate bloated IDE.]

教訓:IDEは高校生まで.
[L: To use a IDE can be applicable, if U R a HS kid.]

2007/02/16

suspend(&SimHDL);

シミュレーションを一時保留し,先行インプリを開始.
何気に一次納入カチカチな気配. :p
[Suspend HDL simulations, launching pre-implementation test.
Hmm, makin' 1st delivery kinda subtle, though. :p]

で,
Gmailのアクセス禁止を回避するユーザを検知する5つの方法
参照先のpop * crap^H^H^Hopはどーでもいーとして,
trombikせんせーにおこられないよーにしなければ! :(((
[BTW,
Detecting malicious GMail users
We'd have to reconsider ourselves. :(((]

2007/02/15

setTrap(&Chocolate);

全男性社員のデスクにチョコが光臨.
同じ階の上司さん(女)曰く,
「期待してるよー」
[Manifestation of chocolate on my desk,
then my bosses (female) sez,
"we're looking forward to your quid pro quo."]


















罠か!? :(((
[WTF on the earth did they trap us!? :(((]

2007/02/11

doEMail(&nwccDev, Engrish);

Eng'r'ishでめーるの返事を書くのにけっこー時間がかかってる.
まだまだぜよ.
[Replying e-mail w/ my bad Eng'r'ish takes me a bit
of long time, Hmm...]
















と言うかpatchを書いた方が早かったんじゃないかと今更気づいたり. :P
[Oh, wait...
To code a patch is better way to go ? :p]

2007/02/10

doEbuild(&nwcc[0][7][1]);

sys-devel/nwcc-0.7.1を突っ込んだ.
昨日のmedia-gfx/exact-imageと同じく
configure/build/install scriptがアレ気. :p
jabberwocky上で"Hello, world!"を作ると
nwccの方がgccの二倍程デカいバイナリが出来る.
が,コンパイラそのもののbuildはちょー早い. :DDD
コンパイラは60kSLOC弱,プリプロセッサは10kSLOC強.
[Add sys-devel/nwcc-0.7.1.
Its configure/build/install script is bit of funny. :p
T3h "Hello, world!" of nwcc is bigger than gcc's about x2 or so.
But, required time to build nwcc is faster than gcc's, of cource.
Well, about 1/10 or so? :DDD
The compiler is 60kSLOC, preprocessor is 10kSLOC.]
Nils Weller's C compiler

2007/02/09

doEbuild(&ExactImage[0][3][4]);

media-gfx/exact-image-0.3.4を突っ込んだ.
configure/build/install scriptがアレ気. :p
[Added media-gfx/exact-image-0.3.4.
Its configure/build/install script is a bit of funny. :p]
ExactImage

2007/02/07

delta_delay.mess(&me);

今日は何故か,昨日動いたと思ったPCIMSがHardMACの上に
突っ込んだヤツだけ動かなくてハマった.
原因はtest bench内でのclockの接続が或る条件を満たす時のみ
再現するシミュレーション上でしか発生しないPCIMS内部に
存在するbug. :(((
[Today, t3h dumb PCIMS is dead again where top of
HardMAC, though top of memory did work.
b/c t3h PCIMS has silly rarely reproducible bug
only when it's in simulation phase, ZOMG! :(((]

で,教訓.
例えtest benchでもclockをsignalとして使うと何気に死ねる. :P
[L: So don't use clock as signal even if in test bench,
otherwise you will be *stabbed*. :p]

で,午前二時半ですがoverlay掃除中. :p
[Here is about 2:30 AM, /me pokes /me 's overlay. :p]

追記:
GGI 2.2.2を突っ込んだ.
[ADD:
Stuff GGI 2.2.2 ebuilds to overlay.]
2007/02/07 04:36:04 MooZ
hy
2007/02/07 04:37:04 hiyuh
yo :)
2007/02/07 04:37:34 MooZ
hey hiyuh ! what's up?
2007/02/07 04:38:06 hiyuh
poking 2.2.2 release on 64 bit userland :)
2007/02/07 04:38:14 MooZ
:)
2007/02/07 04:39:12 hiyuh
so some stuffs warn me like "no 64 bit safe", though. it needs
to fix?
2007/02/07 04:39:24 MooZ
yep!
2007/02/07 04:39:39 MooZ
there're pointer to 32 bits int casts?
2007/02/07 04:41:12 hiyuh
maybe, these are marked w/ ton of #warning. :p
2007/02/07 04:41:54 MooZ
:)
2007/02/07 04:42:05 CIA-21
cegger * ggi-core/libggi/programs/demos/cube3d.c: add newline in
usage output.
2007/02/07 04:44:23 hiyuh
hmm, this? http://devmanual.gentoo.org/archs/amd64/index.html
2007/02/07 04:45:39 MooZ
arg
2007/02/07 04:45:55 MooZ
sigsev : not enough brain left
2007/02/07 04:45:56 MooZ
:)
2007/02/07 04:46:41 hiyuh
muhehe

2007/02/07 06:02:52 hiyuh
:) http://dev.gentoo.gr.jp/~hiyuh/cgi-bin/hgweb.cgi
2007/02/07 06:04:27 MooZ
hehe nice :p
2007/02/07 06:04:37 hiyuh
and the previous misc dir has now GGI 2.2.2 build logs on 64 bit
userland w/ 2.6.20 headers.
2007/02/07 06:07:07 hiyuh
umm, 6:00 AM...
2007/02/07 06:08:06 MooZ
it's 6:00 am in Japan?
2007/02/07 06:09:06 hiyuh
yup
2007/02/07 06:09:45 MooZ
you are insomniac?
2007/02/07 06:09:51 hiyuh
lol
ねむー. :p
[SIGZZZ :p]

2007/02/06

PCI_MODEL_REQ.oxGNT.karma--;

PCI LBがやっと動いた. :p
[Pwnt, PCI LB WORKS FOR ME(tm). :p]

犯人はCPUとbus arbiterのモデルとして使っていたPCI_MODEL_REQ.vhd.
こいつのGNT#が他のbus masterからREQ#が入らないと不定だったと言うオチ.
PCI LBにぶら下がっているメモリモデルがbus master disableだったので,
PCI masterの内部マクロがイイ感じに暴走していた. :(((
サクっと*stab*して終了.
[It did not work b/c suck0rz PCI_MODEL_REQ.vhd as CPU + bus arbiter.
pre-fixed one can not determine its GNT# if REQ# from other bus mster
havenot been inputed, ZOMG...
The memory model at PCI LB is disabled PCI master functionalities.
Then, the master sub-macro did overide. :(((
The fix is simply *stab* '1' to its GNT# as initial value, PERIOD. ]

MOS-FETで言う所のゲートが浮いていたってトコか? :p
[cf. the case of MOS-FET w/ floating gate. :p]

2007/02/02

ModelSim[XE][III][6][1][e].karma--;

ModelSim XE III 6.1e,イイ感じに低品質,
Spartan-3 x 4個程度のシミュレーション程度で遅くなるとか,
シミュレーション中,たまにbacktraceを吐いて刺さるとか. :(((
[ModelSim XE III 6.1e really suck0rz.
It's getting slow when a simulation w/ Spartan-3 x 4,
then finally, it vomits rock0rz backtrace, ZOMG... :(((]

で,最近,標準仕様の後方互換性が非常に邪魔に感じる.
マイナーでも構わないのでまともなBUS仕様は無いもんかな?.
取り敢えず,Power ISAを読んで現実逃避. :p
[All backward compat is really eyesore for me, think that should be shot.
Plz let me know, if you know sane bus specification.
Minor ones are really welcome.
Now, I'm poking Power ISA, though. :p]

2007/02/01

PCI_LB[3][0].karma--;

やっとHardMACから脱出して,一時的にPCI local busな感じ.
例によってちゃんと分かっている訳ではないので,PCI SIGの原文をムニャる.
二日間ムニャったが,PCI LB 3.0はダメダメ. :p
そしてPCI LB 2.xの時に作ったと言うPCI Master/SlaveのVHDLとかも
かなりアレ気で萎える. :(((
[Now, it's time to PCI local bus instead of t3h HardMAC.
I've poked PCI LB 3.0 specification from PCI SIG, though.
Well, my feeling is just "BLAH". :p
Hmm, t3h VHDL stuff was coded w/ PCI LB 2.x is "BLAH"-er. :(((]

ま,取り敢えず,納期も有るので機能的に問題の無い部分は保留して,
仕様書と整合性の取れていないブツに関して言及した上司へのメールに
以下のメッセージを追加.
[Meanwhile, the suck0rz thingy are now pending.
But, I had to try e-mail about inconsistencies of code and doc
w/ those message to my bosses.]

# WE NEED MORE AND SANE CONSISTENCIES.
# OTHERWISE, JUST ABANDON THESE CRAPS.

返事には「お前の言いたい事はよーくわかった」と書いてあった. :DDD
[The reply was "I know, but STFU n00b..." :DDD]