bench/BENCH_CALCULATE_SNR_SINR.vhd | 25 bench/BENCH_DIVSR_RR.vhd | 206 + bench/BENCH_DIV_SS.vhd | 209 + bench/BENCH_DIV_UU.vhd | 147 + bench/BENCH_S1IC.vhd | 433 +++ bench/BENCH_S1WCAL.vhd | 925 +++++++ bench/BENCH_S2WFMA.vhd | 426 +++ bench/BENCH_S4LLR.vhd | 167 + bench/BENCH_S5LDPCD.vhd | 175 + bench/BENCH_S6PP.vhd | 262 ++ bench/BENCH_S7RIE.vhd | 331 ++ bench/BENCH_S7SRG.vhd | 330 ++ bench/METABENCH_S1IC.vhd | 43 bench/METABENCH_S1WCAL.vhd | 99 bench/METABENCH_S2WFMA.vhd | 69 bench/METABENCH_S4LLR.vhd | 69 bench/METABENCH_S5LDPCD.vhd | 69 bench/METABENCH_S6PP.vhd | 28 bench/METABENCH_S7RIE.vhd | 141 + bench/METABENCH_S7SRG.vhd | 43 vhdl/ABS2SR_C.vhd | 311 ++ vhdl/ABS2ST_C.vhd | 235 -- vhdl/ADDSR_CC.vhd | 140 + vhdl/ADDSR_RR.vhd | 243 ++ vhdl/ADDSR_UU.vhd | 255 ++ vhdl/ADDST_CC.vhd | 196 - vhdl/CALCULATE_SINR.vhd | 68 vhdl/CALCULATE_SNR.vhd | 205 - vhdl/DIVSR_CR.vhd | 161 + vhdl/DIVSR_RR.vhd | 336 ++ vhdl/DIV_SS.vhd | 254 ++ vhdl/DIV_UU.vhd | 13 vhdl/ESTIMATE_NOISE.vhd | 35 vhdl/LDPCD-stub.vhd | 3 vhdl/LLR2PP.vhd | 266 +- vhdl/MULSR_CC.vhd | 420 +++ vhdl/MULSR_CR.vhd | 307 ++ vhdl/MULSR_CRCONST.vhd | 138 + vhdl/MULSR_RR.vhd | 245 ++ vhdl/MULSR_RRCONST.vhd | 237 ++ vhdl/MULSR_UU.vhd | 222 + vhdl/MULSR_UUCONST.vhd | 214 + vhdl/MULST_CC.vhd | 283 -- vhdl/NbySNR.vhd | 4285 +------------------------------------ vhdl/NbySNR_ROM.vhd | 595 +++++ vhdl/PP2RIE.vhd | 212 + vhdl/PP2SRG.vhd | 275 +- vhdl/PSQUASH.vhd | 90 vhdl/ROUND.vhd | 142 + vhdl/S1IC.vhd | 30 vhdl/S1WCAL.vhd | 931 ++++++++ vhdl/S1WCCM.vhd | 275 ++ vhdl/S1WCFA.vhd | 355 +++ vhdl/S1WCFB.vhd | 386 +++ vhdl/S1WDET.vhd | 431 +++ vhdl/S1WINV.vhd | 293 ++ vhdl/S2WFMA.vhd | 58 vhdl/S3SINR.vhd | 84 vhdl/S4LLR.vhd | 8 vhdl/S5LDPCD.vhd | 49 vhdl/S7RIE.vhd | 100 vhdl/S7SRG.vhd | 146 - vhdl/SRG2IC.vhd | 317 +- vhdl/SUBST_CC.vhd | 196 - vhdl/WCCM.vhd | 228 + vhdl/WFMA.vhd | 244 +- 66 files changed, 12916 insertions(+), 5798 deletions(-)NbySNRをROM化した影響で他の変更分がかすんでしまった. :DDD
主要な行列演算部分をelaborate-time fixed pointなオレオレプリミティブで構成したので,後でbit精度が問題になってもなんともないぜ,さすがオレ!!1 :DDD