MeasureSLOC(p_HardMAC);

例のP4のHardMACレポジトリのSLOCをrevisionを横軸にグラフ化．
[This is t4h HardMAC SLOC history.]

このデータを生成する為にでっち上げたスクリプトが異様に遅かったので考察する気が萎えた． :P
[Hmm, why on the earth my stupid script to generate this graph's
data is too slow? Damn it, 2 lame. :P]

DoCheck(pp_graph) ? P4.karma++ : P4.karma--;

予想に反してグラフ化は半日もかからず終了，さすがsed(1p)+awk(1p)，最強．
が，excelなファイルにデータをcopy'n'pasteするのに半日，なんてこった． :P
[Hmm, to convert these ton of log to graphs takes only a half of day,
thanks to damn nice sed(1p)+awk(1p). As you know, I'd have to take
another half of it for copy'n'paste to awesome excel sheets, ZOMG. :P]

明日，体裁を整えたハードコピーを納品すれば，締切に追われる仕事は無くなるハズ．
つー事で，久しぶりに#-bugsで不良社員に戻ってみる．
['Kay, all rest of TODO is making hard-copy stuffs. So, I've make me
doofus at #-bugs after long absence.]

6/11 21:21:09 hiyuh_work
    yo
6/11 21:22:45 jakub
    oy! :)
6/11 21:23:26 eroyf
    (: !oy
6/11 21:23:39 hiyuh_work
    any funny bug? :P
6/11 21:24:01 eroyf
    there is that swearing bug
6/11 21:24:04 eroyf
    that's quite amusing
6/11 21:24:36 jakub
    haha :D
6/11 21:24:37 hiyuh_work
    muhehe
6/11 21:26:41 jakub
    eroyf: hmm, it's been CANTFIXed... what a surprise :D
6/11 21:26:47 eroyf
    yeah
6/11 21:26:51 eroyf
    amazing
6/11 21:26:52 eroyf
    heh
6/11 21:26:52 eroyf
    :P
6/11 21:26:56 hiyuh_work
    lol
6/11 21:27:16 eroyf
    it should have been STOPFILLINGRETARDEDBUGSYOUFUCKHEAD
6/11 21:27:38 jakub
    oh noes, swearing in #-bugs!
6/11 21:27:44 *
    jakub files a blocker bug!
6/11 21:27:45 jakub
    :P
6/11 21:27:53 eroyf
    hahaha

今日はoverlayでもいじるべす． :DDD
[Yay, I'll poke my overlay tonight. :DDD]

wc -l log/* | tail -n 1

例のP4の試験データ取得終了．あとはコイツをグラフ化すればCLOSEだが．
['Kay, to get all test log is completed now. I can CLOSE t3h P4
when I had made some graphs w/ these logs, though.]

 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP |  125 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP |  126 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP |  126 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP |  127 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP |  127 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP |  126 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP |  126 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP |  128 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP |  124 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP |  122 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP |  123 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP |  122 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP |  121 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP |  122 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP |  131 ++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP |  224 +++
 ttlog_BS1_SS1_CH21_16QAM1of2_TSSI13dBm_PeerATT87dB_RSSI-74.0dBm_UDP |  426 +++++++
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP |  114 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP |  114 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP |  115 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP |  113 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP |  111 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP |  110 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP |  111 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP |  112 +
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP |  118 ++
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP |  139 ++
 ttlog_BS1_SS1_CH21_16QAM3of4_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP |  317 +++++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-35.8dBm_UDP  |  135 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_TCP  |  110 +
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT55dB_RSSI-40.0dBm_UDP  |  135 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-44.8dBm_UDP  |  135 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-49.9dBm_UDP  |  132 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT65dB_RSSI-51.9dBm_UDP  |  129 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-52.8dBm_UDP  |  134 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT69dB_RSSI-53.8dBm_UDP  |  135 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT71dB_RSSI-56.0dBm_UDP  |  134 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT73dB_RSSI-58.2dBm_UDP  |  131 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-62.3dBm_UDP  |  106 +
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  104 +
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  140 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  143 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  123 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  141 ++
 ttlog_BS1_SS1_CH21_BPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  207 +++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  114 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  114 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  117 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  115 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  114 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  115 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  114 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  114 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  112 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT77dB_RSSI-64.7dBm_UDP  |  112 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  113 +
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  125 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  126 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  126 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  129 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  165 ++
 ttlog_BS1_SS1_CH21_QPSK1of2_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP  |  462 +++++++
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.3dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  115 +
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  220 +++
 ttlog_BS1_SS1_CH21_QPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  583 ++++++++++
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  107 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  100 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  104 +
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  133 ++
 ttlog_BS1_SS1_CH23_QPSK3of4_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP  |  464 +++++++
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  104 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  100 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT77dB_RSSI-64.7dBm_UDP  |  100 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  105 +
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  126 ++
 ttlog_BS1_SS1_CH25_QPSK3of4_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP  |  385 ++++++
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  102 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  101 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  103 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  116 +
 ttlog_BS1_SS1_CH27_QPSK3of4_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP  |  329 +++++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP |  126 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP |  126 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP |  126 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP |  126 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP |  126 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT77dB_RSSI-64.7dBm_UDP |  129 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP |  128 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP |  128 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP |  138 ++
 ttlog_SS1_BS1_CH21_16QAM1of2_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP |  282 ++++
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP |  114 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP |  127 ++
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP |  114 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP |  116 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP |  115 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP |  114 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP |  116 +
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP |  123 ++
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP |  144 ++
 ttlog_SS1_BS1_CH21_16QAM3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP |  352 ++++++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_TCP  |   95 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_TCP  |   95 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_TCP  |   99 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_TCP  |   97 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_TCP  |   83 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_TCP  |  100 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_TCP  |  100 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_TCP  |  100 +
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_TCP  |  223 +++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_TCP  |  228 +++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_TCP  |  227 +++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_TCP  |  221 +++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_TCP  |  129 ++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_TCP  |  125 ++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_TCP  |  136 ++
 ttlog_SS1_BS1_CH21_BPSK1of2_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_TCP  |  302 +++++
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_TCP  |  111 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |   98 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |   97 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |   92 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |   96 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |   97 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |   96 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |   94 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |   96 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |   98 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  107 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  107 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  106 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  115 +
 ttlog_SS1_BS1_CH21_BPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  185 +++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  115 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  114 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  116 +
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT77dB_RSSI-64.7dBm_UDP  |  120 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  119 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  120 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  120 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  122 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  135 ++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  304 +++++
 ttlog_SS1_BS1_CH21_QPSK1of2_TSSI13dBm_PeerATT86dB_RSSI-73.0dBm_UDP  |  279 ++++
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT51dB_RSSI-36.5dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT54dB_RSSI-39.7dBm_UDP  |  104 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT59dB_RSSI-45.7dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT63dB_RSSI-50.7dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT68dB_RSSI-53.8dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT72dB_RSSI-58.2dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT74dB_RSSI-60.6dBm_UDP  |  103 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT75dB_RSSI-61.8dBm_UDP  |  105 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT76dB_RSSI-63.0dBm_UDP  |  104 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT78dB_RSSI-65.4dBm_UDP  |  104 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT80dB_RSSI-67.8dBm_UDP  |  104 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT82dB_RSSI-69.1dBm_UDP  |  104 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT83dB_RSSI-70.3dBm_UDP  |  105 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT84dB_RSSI-71.0dBm_UDP  |  112 +
 ttlog_SS1_BS1_CH21_QPSK3of4_TSSI13dBm_PeerATT85dB_RSSI-72.0dBm_UDP  |  244 ++++
 226 files changed, 29677 insertions(+)

なんてこった．死ぬるな，これは． :DDD
[ZOMG, holly shit. :DDD]

do_imp(PJITTER); relaod(p_shippo);

今日は劣悪な無線伝送路越しから確実にログファイルを回収する為の
俺様アクセス制御を再考し．結局，最大値を指定可能な疑似ジッタ付
加で良いやー，って事でサクっとインプリ完了．
月曜日にまた現地に出張って終われば良いなーとか妄想中．
[Today, I pondered a pseudo userland MAC to get some log files
over a low-link-quality wireless medium. Finally, I've implemented
it w/ maximum delay restricted pseudo-jitter retrying.
Umm, I'd have to go t3h customer's lab to adj that implementation
again.]

そうそう，このプロジェクトP4が延びに延びた為か，しっぽが再生
してしまいました． :P
['Kay. This project P4's progess delays make my shippo reload, LOL. :P]

wc -l XXXXwrapper

ユーザーランドのSMEと称してPCI LB経由でHardMAC内部のレジ
スタを直にモニョれる様に改造したnet-wireless/wireless-tools
を使いまくって，sh(1p)+sed(1p)+awk(1p)なのに蝶unportable
なinitスクリプト作成中． :P
[Due to with modified net-wireless/wireless-tools which can
handle raw HardMAC register operation via PCI LB, t3h init script
as userland SME which I'm coding is really unportable even if it
only uses sh(1p), sed(1p) and awk(1p)． :P]

なんか1300 SLOCを超えているんですが，罠ですか？
そうですか． :DDD
[Well, it's over 1300 physical SLOC though. I'd heve to say "O RLY?"
and "YA RLY!" :DDD]

oldlibc.float.karma--; netdev.watchdog.karma--;

TSSIのRSSIへの回り込みはAGCのステートマシンをムニョって誤摩化した．
が，新たに二つ問題が発生．一つは解決済み，一つは原因を調査中．
[T3h TSSI/RSSI mixing issue, I worked around it by modifed FSM of AGC.
Meh, 2 new PITAs commin'. One of these were fixed, another one's progress
is still incestigating.]

前者は古いlibcをSH4なんつーマイナーなアーキテクチャで使用している為，
floatな演算が全部死んでいると言う悪夢．struct timevalの精度がusなので，
適当に10^6倍して整数で計算すると言うチキンな逃げもあったが，SoftFloat
をstdint.hでportしたブツでモニョった．Softfloatのライセンスに限ったモノ
でもないけれど，ライセンス云々はWTFPL以外ヨクワカンランし，詳細を
理解する気もあんまり無いので，後で叩かれない様にportしたブツはこの辺
に晒しておく．
[Former is due to old libc on SH4, a minor arch. It results nightmate of totally
invalid floating point arithmetic operation. As you know, resolution of struct
timeval is us, so in my case, to x10^6 w/ integer operation is enough to work
around this crap, how chicken though. To be no chicken is better I thought,
then I've poked it w/ SoftFloat portion w/ stdint.h. Any license is not easy to
understand its detail, except WTFPL IMHO. To prevant license violation, t3h
portion of SoftFloat is stuffed here.]

後者はSoftMACがnetdev watchdogなtransmission timeoutになる事．
多分，PCI DMA関連がハードもソフトも腐っているからだろうけど，
取り敢えず，要調査．
[Latter is a SoftMAC issue about netdev watchdog transmission faults
due to its timeout. Guess b/c PCI DMA's software/hardware suck0rz.
Anyway I'll fix ASAP.]

#if DUMB_RF_CHIP #include <tssi.h> #endif

"ごーるでんうぃーく"後半，しゅーりょー．
結局，

• 400ml献血．
  前と検査方法がちと変わっていた．


• ALSA AOAをムニャるが，ダメっぽい．
  さすがflameeyes様，release candidateでもなんともならんぜよ． :DDD
  gcc-4.1.2で-Osなんぞかましているからかもしれん．


• 土曜日の明け方に寝たら，日曜日の夜に起きたので，
  Overlayおよび~arch化は依然放置プレイ中． :P

つー感じでした．
[Last half of GW was over.

• 400ml blood donated.
  T3h test method has been changed.


• ALSA AOA still rock0rz.
  Gosh flameeyes, any release candidate won't help. :DDD
  Guess gcc-4.1.2 + -Os breaks some core stuffs?


• Went to bed at dawn of Sat, awaked at night of Sun.
  So Overlay and ~arch-nize has little progress. :P

]

で，次期AGCのコアとなる有理数型演算マクロを土日に寝ながら妄想．
やっぱ徐算が問題，ニュートン-ラプソン法+二進約分で何とかなるかな？
[Then, I thought some idea of next AGC core, rational OPs' macro in
my sleep. Yup, DIV may be kinda PITA, Newton-Raphson method +
binary reduction may help, or?]

で，SoftMACでOOPSしない様に負荷をかけつつ，HardMACをオシロや
ロジアナでムニャへニャすると，TSSIがRSSIに回り込んでいる事が発覚．
そこで回り込みですか，まじか． :(((
[So, I've continue the HardMAC stress test w/ oscilloscope and logic
analyzer. Blah, RSSI includes TSSI... Ugh, dumb fall through, ZOMG. :(((]

grabOOPS(&DMARBuf) ? DMARBuf.karma-- : DMARBuf.karma++;

"ごーるでんうぃーく"前半も終了しましたが如何がお過ごしでしょうか？
[Half of GW was over, sup ppl?]

受信側PHY下位層のゲイン調整マクロAGCの内部のステートマシンを修正．
送受信PHY下位層の直交変調復調マクロMODU/DMODUのオーバーフローを処理．
受信側PHY内部の周波数誤差補正マクロAFCのオーバーフローを処理．
送受信PHY内部のIFFT/FFTマクロのゲインを調整．
HARD_MAC/PHY間のインターフェースマクロMACIFを修正．
PCI LB/HARD_MAC間のインターフェースマクロBA_BUS_ADPを修正．
その他，色々．
[Under reception PHY, fix0rz FSM of AGC.
Under transmission/reception PHY, purge0rz OVR of MODU/DMODU.
Inside reception PHY, fix0rz OVR of AFC.
Inside transmission/reception PHY, tune0rz gain of IFFT/FFT.
Boundary of HARD_MAC/PHY, fix0rz semantics of MACIF.
Boundary of HARD_MAC, fix0rz semantics of BA_BUS_ADP.
Blah, blah, blah.]

で，やっとこさ，SoftMAC側の負荷試験が出来るなーとか思いつつ，
おもむろに"ping -f"とか"ping -s"を実行．
SoftMAC内部のPCI DMAのリングバッファがOOPSするbugが発覚．
そこでOOPSですか，まじか． :(((
[K, It's time of SoftMAC stress test.
"ping -f" and "ping -s" really sound rock.
T3h PCI DMA ring buffer sez OOPS.
Well, OOPS? O RLY? :(((]

最近，土日も関係無く仕事で，"ごーるでんうぃーく"前半をアレな感じで
フル出場してしまったので，「お前，休めよ」とボスからも"待った"を入れられる．
そこで強制休暇ですか，まじか． :DDD
[Meh, so half of GW was over now, kinda sucks.
My boss sez "U must have hols".
Well, U force me? O RLY? :DDD]

以下，"ごーるでんうぃーく"後半のTODO．

• 献血する


• ALSA AOAが死ぬのでムニャる


• 放置プレイしていたOverlayをモニョる


• ~archな先っぽでヘニャる

[Here is TODO of my last half of GW.

• blood donation


• Fix ALSA AOA


• Update my Overlay


• Play w/ ~arch

]

SIGERRFREE

祝エラーフリー，BER < 10^-7 @ 16QAM 3/4． :DDD
[LOL, SIGERRFREE now. BER < 10^-7 @ 16QAM 3/4. :DDD]

が，受信側PHY下位層のCCAに自分の送信信号が引っかかる問題が発覚．
そう言えば，送信側PHY下位層のステートマシンとこの部分のステートマシン，
別々だった．エレガントに修正しようとした所，ボスに割り込みをかけられ，
モチベーション低下． :(((
[Oh wait. CCA of under-layer than RX PHY sometimes mis-detects
own TX signal as others'. Hmm, FSM in the macros of under-layer than
TX PHY is isolated from under-layer than RX PHY's, ZOMG. I'd have to
fix it ASAP though my boss interrupts my fix0rz, dunno why...]

なので月末恒例の社内飲み会でコーラをがぶ飲みして，修正は明日にして
帰って来た．ゴールデンウィーク？知らんな，そんなもん． :P
[Blah, it drains my motivation completely. So I scored Coke at where t3h
monthly NomiKai b/c mark this bug LATER. I'll fix it tomorrow.
Eh, golden week? I dunno that craps. :P]

修正：b/c typos :P
[FIX: b/c typos :P]

DiffStat(pRepo, rc31, rc32);

今日の分．
入出力レイテンシを考慮して，無効な出力を禁止する処理を追加．
内部及び出力オーバフロー処理を追加して，一部ユニティゲインを調整．
firmwareにする為にISEでムニョらせて只今絶賛放置プレイ中． :P
[Here's today's one.
Reconsider input to output latencies, then make it inhibit invalid output.
Fix for internal and external overflow ceiling/flooring w/ tuning t3h
unity gain. To convert it to firmware needs to do it w/ retarded ISE craps. :P]

 bench/DUMB_RF.vhd  |   17 ++-
 vhdl/AGC_CA.vhd    |    6 -
 vhdl/AGC_FA.vhd    |  269 ++++++++++++++++++++++++++---------------------------
 vhdl/DMFx8.vhd     |    9 +
 vhdl/IPFx8.vhd     |    2 
 vhdl/PWRC.vhd      |   32 +++---
 vhdl/QDM_BPF.vhd   |   10 +
 vhdl/UGT.vhd       |   27 ++++-
 vhdl/UND_BLOCK.vhd |  124 ++++++++++++------------
 vhdl/UNI_BLOCK.vhd |   90 ++++++++---------
 vhdl/UNP_BLOCK.vhd |   54 ++++++----
 11 files changed, 337 insertions(+), 303 deletions(-)

AGCをモニョる事が出来る人間が居ないらしいので，
何故か次のブツのAGCも担当する事になっているっぽい．
ゲイン調整をする事自体が目的ではないので行列計算が出来る位，
ハードウェア側にリソースは与えられないし，PIDはそろそろ飽きた．
昔，スライディングモード制御をヘニョった記憶があるので，
有理数型のスライディングモード制御マクロとかで． :P
[TTT, b/c there is no one who can treat AGC ATM, I'd have to do it
for next project as well. IRL, tunig RF/IF bound gain is not main
propose of the project. Yup, matrix OPs capable resource is not available
and tuning PID paramter is bit of dull. IIRC, I've poked sliding mode
control method. So rational arithmetic sliding mode control macro
is a way to go? :P]

DiffStat(pRepo, beta16, rc31);

前回からのdiffstat．
相変わらず安定しない．．．． :P
[Here's diffstat from previous post.
Hmm, it's kinda unstable code... :P]

 a/vhdl/CCAD.vhd            |  116 -----
 a/vhdl/LOCKD.vhd           |   68 ---
 b/vhdl/DMFx2.vhd           |  112 +++++
 b/vhdl/DMFx8.vhd           |  112 +++++
 b/vhdl/IPFx2.vhd           |  114 +++++
 b/vhdl/IPFx8.vhd           |  114 +++++
 b/vhdl/PLSEXPI.vhd         |  104 ++++
 b/vhdl/QDM_BPF.vhd         |  134 ++++++
 b/vhdl/QM_BPF.vhd          |  143 ++++++
 bench/BENCH_AUGT.vhd       |   56 ++
 bench/BENCH_MODU_DMODU.vhd |   99 ++--
 bench/BENCH_UNPID.vhd      |   60 +-
 bench/DUMB_RF.vhd          |  143 +++++-
 bench/STA.vhd              |   24 -
 bench/STA2STA.vhd          |   12 
 vhdl/AAO_UGT.vhd           |  120 ++---
 vhdl/AGCSTM.vhd            |  441 +++++++++++++------
 vhdl/AGC_CA.vhd            |   71 +--
 vhdl/AGC_FA.vhd            |  119 +++--
 vhdl/AGC_NG.vhd            |  292 ++++++++++---
 vhdl/AUGT.vhd              |   52 +-
 vhdl/DC_BLOCK.vhd          |   51 +-
 vhdl/DMODU.vhd             |  405 ++++--------------
 vhdl/FFT.vhd               |   20 
 vhdl/FPGA1.vhd             |  192 ++++----
 vhdl/FPGA2.vhd             |  999 +++++++++++++++++++++++++++------------------
 vhdl/GPS3_U301.vhd         |   62 ++
 vhdl/GPS3_U801.vhd         |   76 ++-
 vhdl/HARD_MAC.vhd          |    8 
 vhdl/MODU.vhd              |  600 ++++-----------------------
 vhdl/MONSEL1.vhd           |  106 ++--
 vhdl/MONSEL2.vhd           |  496 ++++++++++++----------
 vhdl/NCDLY.vhd             |   36 -
 vhdl/PHY.vhd               |   43 +
 vhdl/PWRC.vhd              |  202 +++++----
 vhdl/ROUND.vhd             |   76 +--
 vhdl/RSSIC.vhd             |   72 ++-
 vhdl/RSSI_AGC.vhd          |  574 ++++++++++++-------------
 vhdl/RX_BBP.vhd            |  405 +++++++++++-------
 vhdl/SYNC_MA.vhd           |   54 +-
 vhdl/TX_BBP.vhd            |  130 ++---
 vhdl/UGT.vhd               |   74 +--
 vhdl/UND_BLOCK.vhd         |   95 ++--
 vhdl/UNI_BLOCK.vhd         |  103 ++--
 vhdl/UNP_BLOCK.vhd         |   28 -
 vhdl/VECTOR.vhd            |   74 ++-
 vhdl/btfly.vhd             |   27 +
 vhdl/outputIF.vhd          |  301 ++++++++-----
 48 files changed, 4517 insertions(+), 3298 deletions(-)

GentooJP.NomiKai++; /* URakuChou */

ナニのついでに有楽町で飲み会．
以下，技術的有用性皆無なメモ．

• 焼き鳥のガツは胃袋．
• パチンコの必勝法は店員と仲良くなる事だが，賭け事はマルチンゲール也．
• "ナガシ"の管理者とかカッコ良さ気．

[NomiKai at URakuChou.
Here is my useless memo.

• T3h "Gatsu" means tripe in YakiTori world.
• A winning strategy Pachinko is to get friendly the stuff, but all gamble is based on martingale.
• Admin of "Nagasi" sounds rock0rz.

]

午前中と飲みが終わってから日付が変わるまで会社にてAGCのパラメータ調整．
-30dBmから-65dBmまで受信したっぽいが，同期検出の相関値に問題有り．
明日，と言うか今日も出社予定也． :P
[This AM and after the Nomikai, I've poke some AGC parameters.
Its reception functionality is now capable of -30dBm to -65dBm as dynamic range.
But yes, it has a PITA WRT sync timing detection's correlation function's value.
SIGNEEDSTOFIX.]

DiffStat(pRepo, rc15, beta16);

あー，3/28に間に合わせる予定がー． :(((
SoftMACの方は終わっているのに，HardMACがまだまだ低品質．
で，今日までの分．
[ZOMG, 3/28, t3h date expired. :(((
SoftMAC is WORKSFORME, HardMAC is still b0rked.
Then, here's diffstat of rc15 to beta16.]

 b/vhdl/AGC_CA.vhd   |  137 +++++++++++++++++++++++++
 b/vhdl/AGC_FA.vhd   |  279 +++++++++++++++++++++++++++++++++++++++++++++++++++
 b/vhdl/SYNC_MA.vhd  |   94 +++++++++++++++++
 bench/DUMB_RF.vhd   |   16 ++
 vhdl/AAO_UGT.vhd    |   13 +-
 vhdl/AGC_NG.vhd     |   57 +++++++++-
 vhdl/AUGT.vhd       |   11 +-
 vhdl/FPGA2.vhd      |   37 ++++--
 vhdl/NCDLY.vhd      |   70 ++++++++----
 vhdl/PHY.vhd        |    9 +
 vhdl/PWRC.vhd       |  177 ++++++++++++++++++++++++--------
 vhdl/RSSIC.vhd      |  283 +++++++++++++++++++++++++---------------------------
 vhdl/RSSI_AGC.vhd   |    5 
 vhdl/RX_BBP.vhd     |   63 ++++++-----
 vhdl/RX_IOBlock.vhd |   13 +-
 vhdl/TX_BBP.vhd     |   21 ++-
 vhdl/UGT.vhd        |   76 +++++++------
 vhdl/UND_BLOCK.vhd  |   35 +++---
 vhdl/UNI_BLOCK.vhd  |   73 ++++++-------
 vhdl/UNP_BLOCK.vhd  |   74 +++++++------
 20 files changed, 1135 insertions(+), 408 deletions(-)

土日でどれ位ヤレるのかが勝負．:P
[Sat/Sun. Am I ready to ride'on kamikaze, this spring storm. :P]

DiffStat(pRepo, rc14, rc15);

ホンマモンのhot codeって，やっぱdiffだと思うのですよ，ハイ．
つー訳で，現在release candidateしまくりな例のrepositoryで約一週間分
に相当する1.0_rc15 - 1.0_rc14．
[Yup, t3h real hot code means the diff, I thought. So, here is a diffstat
from the repository between 1.0_rc14 and 1.0_rc15, it's about 1 week or so.]

 a/vhdl/AGC.vhd             |  203 -----------------
 a/vhdl/PIDCONT.vhd         |  265 -----------------------
 a/vhdl/RSSICONV.vhd        |   78 ------
 b/bench/BENCH_AUGT.vhd     |  106 +++++++++
 b/bench/BENCH_UNPID.vhd    |  231 ++++++++++++++++++++
 b/vhdl/AAO_UGT.vhd         |  159 +++++++++++++
 b/vhdl/AGCSTM.vhd          |  211 ++++++++++++++++++
 b/vhdl/AGC_NG.vhd          |  465 ++++++++++++++++++++++++++++++++++++++++
 b/vhdl/AUGT.vhd            |  195 +++++++++++++++++
 b/vhdl/UND_BLOCK.vhd       |  153 +++++++++++++
 b/vhdl/UNI_BLOCK.vhd       |  156 +++++++++++++
 b/vhdl/UNP_BLOCK.vhd       |   97 ++++++++
 bench/BENCH_MODU_DMODU.vhd |   67 +++--
 vhdl/CCAD.vhd              |   91 ++++++-
 vhdl/FPGA1.vhd             |   28 +-
 vhdl/FPGA2.vhd             |  400 ++++++++++++++++++-----------------
 vhdl/GPS3_U301.vhd         |   61 +++--
 vhdl/GPS3_U801.vhd         |   62 ++---
 vhdl/LOCKD.vhd             |   49 ++--
 vhdl/NCDLY.vhd             |   59 ++---
 vhdl/PWRC.vhd              |  318 ++++++++-------------------
 vhdl/RSSIC.vhd             |  265 +++++++++++++----------
 vhdl/RSSI_AGC.vhd          |  512 ++++++++++++++++++++++++---------------------
 vhdl/RX_BBP.vhd            |  247 +++++++++++----------
 vhdl/UGT.vhd               |  119 ++++------
 25 files changed, 2967 insertions(+), 1630 deletions(-)

んー，やっぱ思ったより少ない．
うへー，仕事してねぇー． :P
[Hmm, it's also kinda little, I expected. Well, b/c I was not so working
hard? :P]

HotCodeStat(&me);

今弄っているブツのrepositoryのSLOCがどれくらいあるのか晒してみる．
以前のナニからパクって来たモノや他人のブツを元に変更したモノは含めない．
「hot codeのSLOCがどれくらいあるのかが分かるのでは？」と言う目論見． :P
[I'll investigate t3h stuff in current repo's SLOC,
exclude previous project's ones and based on others' code.
I think it will show me my hot code SLOC capability, maybe. :P]

 bench/BENCH_AUGT.vhd       |  106 ++
 bench/BENCH_DSMP2.vhd      |  119 +++
 bench/BENCH_DSMP8.vhd      |  122 +++
 bench/BENCH_FAKE_ADDA.vhd  |  204 +++++
 bench/BENCH_MODU_DMODU.vhd |  283 +++++++
 bench/BENCH_ROUND16.vhd    |   89 ++
 bench/BENCH_UNPID.vhd      |  225 +++++
 bench/BENCH_USMP2.vhd      |  121 +++
 bench/BENCH_USMP8.vhd      |  124 +++
 bench/DUMB_RF.vhd          |  151 +++
 bench/FAKE_ADDA.vhd        |  297 +++++++
 bench/STA.vhd              |  785 ++++++++++++++++++++
 bench/STA2STA.vhd          |  264 ++++++
 do/Bench.do                |   30 
 do/Compile.do              |  424 ++++++++++
 stim/AP_STUB.asm           | 1731 ++++++++++++++++++++++++++++++++++++++++++++
 stim/STA_STUB.asm          | 1735 +++++++++++++++++++++++++++++++++++++++++++++
 stim/include/mk_dchirp.h   |   23 
 stim/src/mk_dchirp.c       |   67 +
 stim/stimgen_DCHIRP.sh     |  155 ++++
 stim/stimgen_TXBB.sh       |  198 +++++
 stim/update_mif.sh         |    3 
 vhdl/AAO_UGT.vhd           |  150 +++
 vhdl/AGCSTM.vhd            |  187 ++++
 vhdl/AUGT.vhd              |  187 ++++
 vhdl/CCAD.vhd              |   63 +
 vhdl/DMODU.vhd             |  375 +++++++++
 vhdl/DPRAM_VINIT.vhd       |   88 ++
 vhdl/DSMP.vhd              |  143 +++
 vhdl/FP1_CLK.vhd           |  110 ++
 vhdl/FP2_CLK.vhd           |   94 ++
 vhdl/FPGA1.vhd             | 1018 ++++++++++++++++++++++++++
 vhdl/FPGA2.vhd             | 1264 ++++++++++++++++++++++++++++++++
 vhdl/GPS3_U301.vhd         |  616 +++++++++++++++
 vhdl/GPS3_U801.vhd         |  518 +++++++++++++
 vhdl/MODU.vhd              |  576 ++++++++++++++
 vhdl/MONSEL1.vhd           |  113 ++
 vhdl/MONSEL2.vhd           |  419 ++++++++++
 vhdl/NCDLY.vhd             |   75 +
 vhdl/PLSEXP.vhd            |  115 ++
 vhdl/PWRC.vhd              |  214 +++++
 vhdl/ROUND.vhd             |   85 ++
 vhdl/RSSIC.vhd             |  266 ++++++
 vhdl/RSSI_AGC.vhd          |  406 ++++++++++
 vhdl/RX_BBP.vhd            |  395 ++++++++++
 vhdl/TX_ADJ.vhd            |  269 ++++++
 vhdl/TX_BBP.vhd            |  334 ++++++++
 vhdl/UGT.vhd               |  127 +++
 vhdl/UND_BLOCK.vhd         |  143 +++
 vhdl/UNI_BLOCK.vhd         |  150 +++
 vhdl/UNP_BLOCK.vhd         |   94 ++
 vhdl/USMP.vhd              |  149 +++
 52 files changed, 15999 insertions(+)

実際の所，この物理SLOCの半分以上はコメントやらお決まり文句のカタマリ．
つーことで，思ったより少ない．
単純計算で論理SLOCで10k以下なので，まだまだ修行あるのみ．
と言うか，テストコード(*.asm)がデカ過ぎ． :P
[Hmm, half of physical SLOC are comments or generic stuff for the syntax.
So, I'd have to say it's kinda nuts, I have to do code more.
Well, t3h test code (*.asm) sucks, too bloat. :P]

GentooJP.NomiKai++; /* OSC2007 Spring */

今日はOSC2007 Tokyo/Spring最終日（二日目）でした．
以下，忘れないうちにメモメモ．
[Today is OSC2007 Tokyo/Spring finale.
These note for my stupid limbo.]

• matsuuさんが持ってきたPS3と某S社のテレビを展示．
  中身のGentooより「SPUとかはどうなのよ？」的な展開が繰り広げられた． :P
  [matsuu displays PS3 w/ S0ny TV. Many comers were talking about
  its SPU functionalities and its software development status,
  instead of installed one. :p]


• 持参したPowerBookを放置プレイ．
  genkernelでこれにはまったり，emerge systemとか．
  [Leave PowerBook alone. genkernel fails due to this bug, but work around.
  Then, emerge system or somthing.]


• trombikさんのcfengine/puppetの発表．
  金曜日にやっていたヤツを10分(?)に短縮．
  [trombik preach down to us WRT neat sysadmin stuffs.
  But it's really rapid, b/c he has only 10 min or so.]


• idaniさんのGentooバッヂを売った/買った．
  在庫 - 10．
  [idani sells cool0rz Gentoo badge, I got new one.
  Stok - 10, ATM.]


• オラ本を買った．
  bin hackとmake．
  [Got O'REILLY books.
  bin hack and make.]


• SUSUBOARDを見てくるついでに，未踏とかどうだったのかを教えてもらう．
  ついでにFPGA技術を買った． :)
  [Admired SUSUBOARD, hearing WRT MiTou thingy.
  Of cource, I got awesome brochure is so-called "FPGA tech". :)]


• Rob Pike氏ネタでPlan9な人と話す．
  #ifdefはダメダメ.
  [9ish guy show me Rob Pike autographed ones.
  "#ifdef considered harmful."]


• 耐久性が二ヶ月に向上したUdaの生演奏．
  例のとんかつ屋が店仕舞いをした事を知る． :(((
  [Live Uda, this new one improved its durable, about ~2mon.
  BTW, t3h TonKatsu restaurant has been closed． :(((]


• lightning talkを拝聴．
  OSS開発者は更なる愛とイタリア料理とチョコレートを必要としています． :DDD
  [Lighting talk, a finale of this event.
  So, now we know OSS devs need more love/italian/chocolates. :DDD]


• 喫茶店でコーヒー．
  MAC層以下な事とか特許とか．
  [Gotta coffee.
  Something about lower layer than MAC and patents thingy.]


• 懇親会参加，なんか色々話した．
  データがデカ過ぎるのでファイルシステムとかDBとかの使い方とか，
  Google Desktopは慣れるとアレとか，
  購入するPCのメモリは多くしてくれとか，
  サーバのステータスのメールに関する教育的指導とか，
  CJK herd増員の計画とか．
  [NomiKai, misc ones are stuffed, feel like ones are missing, though.
  Large/Huge data, file system selection, use of DB dilemma.
  Google Desktop is now really cool, if you like it.
  So, plz give more RAM if you buy new PC.
  A inquisition about flood status mail from servers.
  CJK herd needs more really something.]

早いトコ，今の仕事を終わらせてムニャヘニャするべ． :P
['Kay, I'll do something related Gentoo ASAP when I've done this project.]

修正: typoとか．
[FIX: typos or so.]

(pRF->PWR > RefPWR) ? pRF->ATT++ : pRF->ATT--;

"でむぱのぱわー"を計測，ちょっと調整が必要だったが何とかなった．
残りの問題は，受信側PHY下層のダイナミックレンジ拡張とアレなSME
の仕様をまとめる事．
ナンダカンダで次の納期まで二週間位しかなったりするのは罠ですか，
そうですか． :P
[Measure power of the radio wave. Well, it still
needs to tune a bit, but that's OK ATM.
Then, two major subjects are, 1) increasing dynamic
range of lower layer of reception PHY, 2) mark down
some spec of t3h SME functionalities.
There is only 2 weeks as rest of workable hours?
Blah... :P]

で，今週末はOSC．
予想通り，土曜日のみの参加になりそうな気配．
[BTW, OSC will take place at this weekend.
WTH, I can join that bunch only at the Sat.]

TuneParam(&pRF->ATT);

客先の電波暗室にてRFでナニが通る事を確認．
明日も"でむぱのぱわー"を計測するので早朝から出張也．
巧く行けばこれで一段落するのでOSCには参加出来る見込み．
[In the shield room, RF in/out connected. Tomorrow, we'll
measure the power of radio wave, so I have to get up earlier
than today. If thongs go well, I can enjoy OSC.]

色々騙し騙しなトコが有るので，マジ納入までに何とかしなければ．
先ずは，inner loopとouter loopで五倍近く遅れ時間が違うので，
その辺りからかな？
で，離散時間最適レギュレータでもやらかすか？ :DDD
[Yes, some really somethings are, though. First of all, I'd have
to purge dumb difference delay (x5!) of between inner loop and
outer loop. Oh, wait.. I won't miss t3h "optimal regulator in
discrete time domain". :DDD]

ONCT.karma++; EUC.karma--;

ONCTの某恩師の方が酔っぱらって電話してきた．
今弄っているFPGA内のPID制御器があり得ない出来だった事とか，
あんまりここに書けないモニョモニョな事とか話してたら午前五時． :P
[A former teacher of ONCT call me who is drunk.
We talked about, e.g. a really rock0rz PID controller stuff and
several really somthings. It was already 5:00 AM. :P]

取り敢えず，これを教材に使うとか言い出すのは勘弁して下さい． :DDD
[Oh, plz give it a break. So, don't use this crap as a resume of control
theory class. :DDD]

TuneParam(&pPHY->RSSI_AGC);

IFでナニが通る事を確認．
次はRFでなのだが，小ロットで手に入るRFなチップの出来が低品質な為，
RSSI_AGCと呼んでいるブロックへの入出力に色々補正をしなければなら
ない事が発覚．
[Connected peer IF in/out.
Next is RF in/out tuning, but t3h suck0rz RF chip set is really
retarded. It's mandatory to some adjustment/correction.]

具体的にどの辺りが低品質かと言うと，制御入力が出力に筒抜けになる為，
目標値との偏差が大きい時の粗調段階でシステムが発振する． :(((
これにはテキトーな一次補正で対処．
[E.g. t3h RF chip set through its control input to plant output.
So, it makes hunting when error of targeted value is kinda mighty
in coarse adjustment phase. :(((
We needs to use one-loop correction for it.]

問題はここからで，復調部分にかなり高次のFIRフィルタを噛ませている
関係上，かなり遅れ時間が有る．しかもOFDM特有の時間領域でのトゲが
かなりウザい． :(((
FPGAの容量もギリギリなので二進重み付け平均で対処予定．
[The real subject is.
Part of OFDM demodulation has a high-order FIR filter, it has big
latencies. And then, generally, OFDM symbol in time domain has short
cycle peak. It's really annoying. :(((
I'd have to fix by using binary weighted moving average b/c the
FPGA's logic stuff's capacity limit.]

あとは適当にモニタ信号に色々突っ込んで順を追ってパラメータを調整して，
RFの個体差が誤差の範囲に入る事を祈るだけ． :P
[Well then, to pull some signals related this gain controller and
step by step paramter tuning is all I have to do.
Oh wait, I won't forget to pray t3h RF modules have no considerable
individual variability, though. :P]